EEXCELSOLUTION

Client: www.eexcelsolution.com
Date: Sunday, August 31, 2003
Time: 12:43 PM

Job_Description

Our MNC Client from Bangalore needs dynamic professionals for the following position:

Position: Logic Design Engineer/Lead Experience: 5+ years

Job Description: Located in Bangalore, India, this individual will be responsible for architecture, logic design of blocks, integration of blocks at the chip level, verification of the blocks, synthesis, static timing analysis and timing closure.

Requirements: - The ideal candidate will have a minimum of 5 years of experience in the architecture and logic design area for ASICs. - Hands-on experience in Verilog, VHDL, NC-Verilog, VCS, Modelsim, Synopsys Design Compiler, Physical Compiler and Primetime - Must have successfully completed logic design for various blocks of a multi-million-gate design. - Must be a good team player and should be able to interact with the architecture team and physical design team to carry out his/her task successfully. - Domain knowledge in the areas of display processors, video and television technology is a strong plus - Knowledge of Design For Testability (DFT), UDSM design issues is a strong plus.

Education: B.Tech / M.Tech in Electrical and Electronics / Electronics and Communication

Please forward your Latest Resume as word document attachment.

Thanks

uday@eexcelsolution.com visit: www.eexcelsolution.com

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