B.E(E&C),Exp. in VLSI DESIGN

From: NAKUL SHARMA- seeking a job in the field of VLSI DESIGN
Date: Thursday, April 13, 2006
Time: 02:38 AM

Resume

NAKUL SHARMA Correspondence Address Room no –A4-15,DOS(ISRO) Colony,Near IIMA,Vastrapur, Ahemdabad-3800015 E-Mail: sharma_nakul05@rediffmail.com nakulvlsi@rediffmail.com Phone : 9427029497 Objective: I wish to be a part of VLSI organization that will best avail of my professional capabilities while simultaneously providing a high degree of professional and intellectual satisfaction in work that is challenging and rewarding. Advanced Certificate Training Programme: VLSI SUBSYSTEM DESIGN-ACTP College : M.S.Ramaiah School of Advanced Studies (Bangalore) Status : completed (Nov.2004 to Nov.2005). Module 1: Subsystem & FPGA Design with VHDL Module 2: CMOS Digital & Analog Design Module 3: ASIC Design Module 4: VLSI Testing Skill Sets: Primary skill set VHDL, C Basic. Tools Modelsim, Xilinx ISE, Win spice, HSPICE, LASI-7, Design Compiler, Prime Time, Formality, (SYNOPSYS). Development Boards FPGA board (Spartan 2E). Operating system Windows 9X, NT, XP, 2000. Educational Qualification:  B.E. (Electronics & Communication Engineering) from S.S.I.T.M, Iglas, Aligarh affiliated to Dr. B.R. Amedkar University, Agra, with 73.49% marks in December 2003.  Diploma in Electronics Engineering from Govt. Polytechnic Hardoi, affiliated to Uttar Pradesh Board of Technical Education , Lucknow with 69.40% marks in August 2000.  Intermediate (12th) from Govt. Inter College, Raebareli affiliated Uttar Pradesh Board, Allahabad with Second divison .  High School (10th) from Govt. Inter College, Raebareli, affiliated Uttar Pradesh Board, Allahabad with First divison . Experience:  From DEC 2003 to SEP 2004 Worked with INEX INDIA , NEW DELHI as an Electronics Engineer.  Have undergone Vocational Training in ITI LTD, Raebareli, (2 months). Projects Undertaken: 1. Project Title : I2C Bus controller Implementation on FPGA Tools Used : ModelSim, Xilinx ISE Work done at : M.S.Ramaiah School of Advanced Studies (Bangalore) Description: The aim of this project is to implement an I2C bus protocol and to synthesize the design into the Xilinx ISE. The complete system will enable the Wishbone microcontroller to communicate with I2C complied devices. The FPGA implementation of the I2C controller supports the features as a master and slave mode operation, start and stop signal generation. Data is transferred between a master and slave synchronously to SCL on the SDA line on a byte-by-byte basis. 2. Project Title : Implementation of 16 x 8 SRAM Layout tool : LASI Circuit Simulator : Winspice. Description : Static Read/Write (or Random Access) memory (SRAM) is able to read and write data into its memory cells and retain the memory contents as long as the power supply voltage is provided. Currently SRAM are manufactured in the CMOS technology, which offers very low static power dissipation, superior noise margin and switching speed Designing of six-transistor static memory (SRAM). The layout of the design is implemented by means of the tool called LASI. 3. Project Title : Simulation & Verification of Booths Multiplier. Tools Used : Design compiler, Prime time (Synopsys), Modelsim Description: In multiplying signed numbers together, special care is needed. We Know that multiplying numers with the same sign produces a positive product, but Multiplying a positive number by a negative number yields a negative product. This Project presents Booth’s Algorithm, which is an efficient means of multiplying signed numbers expressed in 2’s complement notation. Personal Data: Father’s Name Mr. R.D. Sharma Date of Birth 5th APR 1980 Sex Male Nationality Indian Permanent Address C/o S.C. Sharma, Shyam Jyoti Sadan, Panchyat Samiti ke Samne Gali Me, Behror, Disst- Alwar, Rajasthan. Marital Status Single Languages Known Hindi,English Declaration I hereby ascertain that the above details furnished are true to the best of my knowledge. Date: Nakul Sharma

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