Firmware Engineer / Embedded Software Engineer

From: Wiplove Mathur, Experience of 4+ years in the wireless industry integrating and developing firmware in C and assembly language, Seeking an exciting and challenging full time position in embedded software design and implementation.
Remote Name: 99.52.103.47
Date: Monday, February 02, 2009
Time: 12:06 PM

Resume

WIPLOVE MATHUR Home Address: 9175 Judicial Dr, Apt 6212, San Diego, CA-92122. Email: wiplovemathur@yahoo.com Phone: 858-336-3696 (Mobile) Homepage: http://wiplove.googlepages.com/ OBJECTIVE Seeking an exciting and challenging full time position in embedded software design and implementation. SKILLS Experience of 4+ years in the wireless industry integrating and developing firmware in C and assembly language. Languages: C, Assembly Language, VHDL, Perl Compilers: CCS, ARM compilers (RVDS, ADS) Processors: ARM, x86, MIPS, TI OMAP, Motorola PowerPC MPC8240, 8032 microcontroller RTOS: Nucleus, MicroC/OS-II Operating System: Linux, SunOS, Windows-98/2000/NT/XP Real time debugging tools: Lauterbach Trace32 ICD, RealView ARM ICE, Code Composer Studio, Max+Plus II, Work View office tools Simulators: XSPIM MIPS simulator, Simplescalar simulation suite, Simics Other Tools: GNU make, SCons, Cygwin, Performance counter interfaces (PAPI), S-Edit, L-Edit, LVS Source control: Rational Clearcase, TortoiseSVN, Perforce WORK EXPERIENCE Senior Firmware Engineer, Staccato Communications, San Diego, CA (January 2009 – Present) - Developed UWB Radio Controller Interface (URCI) layer for a PCI-based WUSB host. Senior Firmware Engineer, Stonestreet One, San Diego, CA (July 2008 – December 2008) Worked on firmware for UWB based WUSB products. - Designed and developed URCI layer for a PCI-based Wireless Host Controller Interface (WHCI) card. - Involved in debugging of WHCI software. - Designed and developed test code for validating the MAC layer interface. Software Development Engineer, Broadcom, San Diego, CA (October 2007 – July 2008) Worked on porting software components for an EDGE phone in the Mobile Communications department. - Involved in integrating modem software with customer’s UI API. - Responsible for porting such software on 2 different development boards. - Resolved board bring-up issues of integrated firmware. Texas Instruments Inc., San Diego, CA (September 2005 - October 2007) Firmware Engineer - Developed and implemented firmware for an embedded camera in GPRS/Edge handsets. o Camera core module was a part of an OMAP application processor. o External 2MP camera sensor supported 15fps at maximum resolution. o Data path was an 8-bit parallel bus; control path used I2C and GPIO bus. - Implemented firmware for USB FIFO device used on a prototype board. System Integration Engineer Worked on integrating and debugging software components for a dual-mode UMTS/3G phone. - Involved in integrating and troubleshooting RTOS, Board Support Package (BSP), abstraction layers, MAC layer, tool interfacing, and MMI. - Implemented phone startup-configuration APIs. - Responsible for maintaining system initializations, and system resources. - Communication with internal teams and customers across the world. UMTS/3G Test Engineer Worked on executing and troubleshooting of UMTS test cases. Dept. of Electrical and Computer Engineering, New Mexico State University (Aug 2001 – May 2004) Research Assistant: Worked on improving accuracy of performance monitoring counters in multiplexed mode Teaching Assistant: - Supervised lab for Introduction to VLSI course - Supervised lab for Computer Architecture course. Assignments included: o C implementation of micro-architecture units. o Assembly language programming for a MIPS processor in XSPIM simulator. o Design and simulation of hardware entities in VHDL using Altera’s Max+Plus II package. Mentor: Las Cruces PREP (Pre-freshman Engineering Program) PROJECT EXPERIENCE Designing and building an Auto-speed adjusting motor - Implemented using an 8032 microcontroller SDK, infrared opto-interrupters, and basic gates. - Firmware coded in C and running on MicroC/OS-II RTOS. Designing and building a hardware Internet Router - Wire-wrapped Motorola MPC8240 Integrated PowerPC processor with ROM, RAM, PCI, clock generator and power supply modules. - Debugged firmware and tested the devices with logic analyzer. Simulation Design and implementation of Wireless Network Protocols - C-implemented one-step simulator for the Split-Multipath Routing algorithm. - New routing protocol (Variable-Hop Proxy-Based Wireless Routing) suggested and simulated in one-step. Load Value Speculation in Simplescalar - Implemented Linear Regression Algorithm and Pattern based prediction to gauge their efficiency as load value predictors. Design, simulation, validation, and layout of 8-bit 8-tap Digital Filter - Implemented using delay elements, multipliers, adders, and accumulators. - Pipelined architecture for maximum speed and clock stalling for proper functionality. Design, simulation, validation, and layout of Mixed Signal Carry Look Ahead Adder - Differential amplifier implemented for reducing the propagation delay of Carry. - Design and simulation in TopSpice, layout in L-Edit. Design and simulation of a 16-bit Microprocessor in VHDL - Based on the fundamentals of RISC processor. - Simulation in Work View Office tool – View Logic. EDUCATION Master of Science (MS), Electrical Engineering (Computer Architecture); May 2004; GPA 4.00 / 4.00 New Mexico State University (NMSU), Las Cruces, NM, USA. Thesis: Improving Accuracy for Software Multiplexing of On-Chip Performance Counters - Implemented and analyzed the technique on counters of Intel Pentium-III processor using PAPI interface. Bachelor of Engineering (BE), Electronics ; June 2001 Bombay University, Veermata Jijabai Technological Institute (VJTI), India. Final year project: Design and simulation of a 16-bit Microprocessor in VHDL - Based on the fundamentals of RISC processor. - Simulation in Work View Office tool – View Logic. PUBLICATIONS - Wiplove Mathur, Jeanine Cook. Improved Estimation for Software Multiplexing of Performance Counters. Proceedings of the IEEE International Symposium on Modeling, Analysis, Simulation of Computer and Telecommunication Systems, Atlanta, GA. Sep 2005. - Wiplove Mathur, Jeanine Cook. Toward Accurate Performance Evaluation using Hardware Counters. In Proceedings of the “Applications for a Changing World,” ITEA Modeling & Simulation Workshop, Dec 2003. RELATED COURSEWORK Extension courses (at UCSD): Embedded RTOS (MicroC/OS-II), Embedded Computer Hardware Interfacing Graduate: Advanced Computer Architecture, High Performance Computers, Operating Systems, Parallel Architecture, Computer Performance Analysis, Wireless Networks, Digital Computer Networks, Digital VLSI Design, Introduction to VLSI Undergraduate: Microprocessors and Devices (8085, 8086/8088, 8259, 8155, 8255, 8254, 8237, 8087, 80386, ISA bus architecture), Microcomputer System Design (Pentium, PCI bus, Peripheral bus interface), Computer Programming in C and Pascal, Analog and Digital Integrated Circuits, Designing with Integrated Circuits, Electronic System Design and Practice, Logic Circuits, Mathematics (I, II, III, IV) ACHIEVEMENTS - Higher Secondary School, Mumbai division, Maharashtra State Board Examination, India, 1997 - Certificate of Merit for 14th rank (out of 75,000 candidates) in general merit list - Certificate of Merit for highest score (100/100) in Mathematics & Statistics - 'Top Student' award in Advance Basic Programming REFERENCES Available on request VISA STATUS Approved H1-B with current employer

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